1 | PACKAGE Pacemaker_Pkg
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2 | PUBLIC
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3 | WITH Data_Model;
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4 | WITH Behavior_Properties;
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5 |
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6 | -- This simplified Pacemaker model has been developed to demonstrate the modelling
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7 | -- capabilities of the Stood for AADL tool and the simulation features of the
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8 | -- AADL Inspector tool.
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9 | -- The formal specification of the behavior of the pacemaker are expressed
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10 | -- in BLESS, whereas the "executable" implementation that is provided here
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11 | -- uses the AADL Behavior Annex.
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12 | -- The design documentation and the AADL source code are both automaticallly
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13 | -- generated from the Stood model.
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14 |
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15 | SYSTEM Pacemaker
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16 | END Pacemaker;
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17 |
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18 | -- The PACEMAKER system consists of three major components:
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19 | -- * Device (also called the pulse generator or PG)
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20 | -- * Device Controller-Monitor (DCM) and associated software
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21 | -- * Leads
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22 | SYSTEM IMPLEMENTATION Pacemaker.others
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23 | SUBCOMPONENTS
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24 | PG : DEVICE PulseGenerator;
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25 | DCM : SYSTEM DeviceControllerMonitor.others;
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26 | CONNECTIONS
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27 | cnx_0 : PORT PG.VentricleSense -> DCM.VentricleSense;
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28 | cnx_1 : PORT PG.AtriumSense -> DCM.AtriumSense;
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29 | cnx_2 : PORT DCM.VentriclePulse -> PG.VentriclePulse;
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30 | cnx_3 : PORT DCM.AtriumPulse -> PG.AtriumPulse;
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31 | PROPERTIES
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32 | Actual_Processor_Binding => ( reference(DCM.HWPlatform) ) applies to DCM.PacemakerSW;
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33 | END Pacemaker.others;
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34 |
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35 | -- The device monitors and regulates a patient's heart rate.
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36 | -- The device detects and provides therapy for bradycardia conditions.
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37 | -- The device provides programmable, single- and dual-chamber, rate-adaptive
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38 | -- pacing, both permanent and temporary.
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39 | -- In adaptive rate modes, an accelerometer is used to measure physical activity
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40 | -- resulting in a sensor indicated rate for pacing the heart.
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41 | -- The device is programmed and interrogated via bi-directional telemetry from
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42 | -- the Device Controller-Monitor (DCM).
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43 | -- This allows the physician to change the operating mode or parameters of
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44 | -- the device non-invasively after implantation.
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45 |
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46 | DEVICE PulseGenerator
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47 | FEATURES
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48 | VentricleSense : OUT EVENT PORT;
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49 | VentriclePulse : IN EVENT PORT;
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50 | AtriumSense : OUT EVENT PORT;
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51 | AtriumPulse : IN EVENT PORT;
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52 | END PulseGenerator;
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53 |
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54 | -- The Device Controller-Monitor (DCM) is the primary implant, pre-discharge
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55 | -- EP support, and follow-up device for the PACEMAKER system.
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56 | -- The DCM is capable of being used both in the OR, physician's o±ce, and the
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57 | -- EP lab.
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58 | -- The DCM communicates with the PG using a communication protocol and supporting
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59 | -- hardware.
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60 | -- The DCM consists of the following:
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61 | -- * A hardware platform
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62 | -- * A pacemaker application software
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63 |
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64 | SYSTEM DeviceControllerMonitor
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65 | FEATURES
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66 | VentricleSense : IN EVENT PORT;
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67 | VentriclePulse : OUT EVENT PORT;
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68 | AtriumSense : IN EVENT PORT;
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69 | AtriumPulse : OUT EVENT PORT;
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70 | END DeviceControllerMonitor;
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71 |
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72 | -- The hardware platform is represented by a processor
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73 | -- The pacemaker application software is represented by a process
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74 | -- An Actual Processor Binding property allocates the sotware application to
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75 | -- the processor
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76 | SYSTEM IMPLEMENTATION DeviceControllerMonitor.others
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77 | SUBCOMPONENTS
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78 | PacemakerSW : PROCESS PacemakerSW.others;
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79 | HWPlatform : PROCESSOR HWPlatform;
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80 | CONNECTIONS
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81 | cnx_0 : PORT VentricleSense -> PacemakerSW.s;
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82 | cnx_1 : PORT PacemakerSW.p -> VentriclePulse;
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83 | END DeviceControllerMonitor.others;
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84 |
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85 | -- The pacemaker software implements the bradycardia operating modes.
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86 | -- In this version, only the VVI mode is supported:
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87 | -- * the Ventricular chamber is sensed.
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88 | -- * the Ventricular chamber is paced.
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89 | -- * a sensnse Inhibits a pending pace.
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90 |
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91 | PROCESS PacemakerSW
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92 | FEATURES
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93 | s : IN EVENT PORT;
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94 | p : OUT EVENT PORT;
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95 | n : OUT EVENT PORT;
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96 | END PacemakerSW;
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97 |
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98 | -- The Pacemaker Software behavior can be tested as follows (in VVI mode):
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99 | -- * Test 1) No sensing.
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100 | -- The thread will put out an event on the "p" port every 1000 ms.
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101 | -- * Test 2) Normal rhythm.
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102 | -- Put an event on the "s" port every 900 ms. The thread will put an event
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103 | -- out the "n" port each dispatch.
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104 | -- * Test 3) Ignore sense in VRP.
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105 | -- Wait 1000 ms for the first pace; 200 ms later put an event on the "s" port.
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106 | -- The next pace will occur at 2000 ms.
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107 | -- *Test 4) Pace after sense.
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108 | -- Wait 1000 ms for the first pace; 200 ms later put an event on the "s" port,
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109 | -- which will be ignored.
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110 | -- At 1400 ms put out another event on the "s" port. Expect the next pace
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111 | -- at 2400 ms.
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112 | PROCESS IMPLEMENTATION PacemakerSW.others
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113 | SUBCOMPONENTS
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114 | VRPTimeout : THREAD DualOrTimer
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115 | { Dispatch_Protocol => Timed;
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116 | Priority => 10;
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117 | Period => 30 ms; };
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118 | LRLTimeout : THREAD DualOrTimer
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119 | { Dispatch_Protocol => Timed;
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120 | Priority => 9;
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121 | Period => 100 ms; };
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122 | VVIMode : THREAD VVIMode.others;
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123 | CONNECTIONS
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124 | cnx_0 : PORT s -> VVIMode.s;
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125 | cnx_1 : PORT VVIMode.p -> p;
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126 | cnx_2 : PORT VVIMode.n -> n;
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127 | cnx_3 : PORT VRPTimeout.output -> VVIMode.vrp_timeout;
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128 | cnx_4 : PORT LRLTimeout.output -> VVIMode.lrl_timeout;
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129 | cnx_5 : PORT VVIMode.p -> VRPTimeout.input2;
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130 | cnx_6 : PORT VVIMode.n -> VRPTimeout.input1;
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131 | cnx_7 : PORT VVIMode.p -> LRLTimeout.input2;
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132 | cnx_8 : PORT VVIMode.n -> LRLTimeout.input1;
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133 | END PacemakerSW.others;
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134 |
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135 | -- The VRPTimeout thread sends an event 300ms after the last normal beat (n)
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136 | -- or forced pace (p)
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137 | -- For the purpose of the simulation, this value has been divided by 10.
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138 |
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139 | THREAD DualOrTimer
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140 | FEATURES
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141 | input1 : IN EVENT PORT;
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142 | input2 : IN EVENT PORT;
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143 | output : OUT EVENT PORT;
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144 | -- The thread can be dispatched on receipt of one of its input ports or after
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145 | -- a fixed amount of time since the last dispatch (timeout).
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146 | -- The timeout delay is given by the Period property.
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147 | -- No explicit action is required when the thread is dispatched by an input
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148 | -- port (implicit action is that it sets the timer).
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149 | -- A send output action is performed only in the case the thread is dispatched
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150 | -- by the timeout event.
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151 | ANNEX Behavior_Specification {**
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152 | STATES
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153 | s1 : INITIAL COMPLETE FINAL STATE;
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154 | TRANSITIONS
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155 | t1 : s1 -[ ON DISPATCH input1 ]-> s1;
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156 | t2 : s1 -[ ON DISPATCH input2 ]-> s1;
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157 | t3 : s1 -[ ON DISPATCH TIMEOUT ]-> s1 { output! };
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158 | **};
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159 | END DualOrTimer;
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160 |
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161 | -- The VVIMode thread reacts to sense signal and generates pulse signals.
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162 | -- The expected behavior is:
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163 | -- * when the heart is beating fast enough, do nothing.
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164 | -- * when the heart has not had a beat for 1000 ms (lrl), cause a pace
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165 | -- * if the sense comes too soon after a beat, <300 ms (vrp), ignore it.
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166 |
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167 | THREAD VVIMode
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168 | FEATURES
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169 | s : IN EVENT PORT;
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170 | p : OUT EVENT PORT;
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171 | n : OUT EVENT PORT;
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172 | lrl_timeout : IN EVENT PORT;
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173 | vrp_timeout : IN EVENT PORT;
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174 | END VVIMode;
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175 |
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176 | -- The VVIMode component can be triggered by its input event ports:
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177 | -- * s: signals a normal heart beat that has been detected by the Pulse Generator
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178 | -- device.
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179 | -- * vrp_timeout: signals that the last beat occured more than 300ms ago
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180 | -- * lrl_timeout: signals that the last beat occured more than 1000ms ago
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181 | -- It is implemented by a thread with Aperiodic Dispatch Protocol and a Behavior
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182 | -- Annex subclause.
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183 | -- A data subcomponent is used to store the VRP state of the thread across
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184 | -- the successive dispatches.
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185 | THREAD IMPLEMENTATION VVIMode.others
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186 | SUBCOMPONENTS
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187 | vrp : DATA int;
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188 | PROPERTIES
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189 | Dispatch_Protocol => Aperiodic;
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190 | Priority => 5;
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191 | -- When the thread is dispatched by the vrp_timeout event, the action is to
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192 | -- set the vrp data subcomponent value to 0 (out of the Ventricular Refractory
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193 | -- Period).
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194 | -- When the thread is dispatched by the s (sense) event, if the vrp value
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195 | -- is 1 (in the Ventricular Refractory Period), ignore it; otherwise generate
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196 | -- a n event (normal heart beat), and set the vrp value to 1.
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197 | -- When the thread is dispatched by a lrl_timeout event, generate a p event
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198 | -- (pace) and set the vrp value to 1.
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199 | ANNEX Behavior_Specification {**
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200 | STATES
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201 | s1 : INITIAL COMPLETE FINAL STATE;
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202 | TRANSITIONS
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203 | t0 : s1 -[ ON DISPATCH vrp_timeout ]-> s1
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204 | { vrp := 0 };
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205 | t1 : s1 -[ ON DISPATCH s ]-> s1
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206 | { if (vrp = 0) n!; vrp := 1 end if };
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207 | t2 : s1 -[ ON DISPATCH lrl_timeout ]-> s1
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208 | { p!; vrp := 1 };
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209 | **};
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210 | END VVIMode.others;
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211 |
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212 | -- This data subcomponent stores the Ventricular Refractory Period (VRP) state.
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213 | -- Its value is 1 during the VRP and 0 otherwise.
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214 | -- It is initialized to 1.
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215 |
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216 | DATA int
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217 | PROPERTIES
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218 | Data_Model::Initial_Value => ("1");
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219 | END int;
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220 |
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221 | -- The HWPlatform component represents the execution platform of the Pacemaker
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222 | -- software.
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223 |
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224 | PROCESSOR HWPlatform
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225 | PROPERTIES
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226 | Scheduling_Protocol => (HPF);
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227 | END HWPlatform;
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228 |
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229 | END Pacemaker_Pkg;
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