Changes between Version 48 and Version 49 of inspector
- Timestamp:
- 06/01/23 15:49:01 (11 months ago)
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inspector
v48 v49 14 14 15 15 The current version of AADL Inspector (v1.9) encompasses the following features: 16 * Import of [wiki:AADL AADL] textual specifications (individual files or projects) 16 * [wiki:AADL AADL] support 17 * AADL Project browser 17 18 * Syntactic analysis (aadlrev) 18 * AADL v2. 2 (AS-5506C)19 * AADL v2.3 (AS-5506D) 19 20 * AADL Behavior Annex v2.0 (AS-5506/2A Annex D) 20 21 * AADL Error Model Annex v2.0 (AS-5506/1A Annex E) 21 22 * AADL ARINC 653 Annex (AS-5506/1A Annex A) 22 * AADL FACE 3.0^TM^ Annex (AS-5506/4 Annex F) 23 * AADL v1, v2.0 and v2.1 upwards compatibility 23 * AADL FACE^TM^ Annex (AS-5506/4 Annex F) 24 24 * Converts older AADL models into v2.2 (with a few restrictions on property associations) 25 * Import of UML/MARTE, SysML or Capella models (experimental) 26 * Import of AADL libraries from !GitHub 25 * Import of AADL libraries from !GitHub 26 * Models import/export (powered by LAMP) 27 * SysML v1 import 28 * FACE 3.0 import 29 * Capella Physical Architecture import 30 * Generic XML/XMI/CSV import 31 * HOOD/SIF export 27 32 * AADL template models: 28 33 * Multi tasks (Real-Time Scheduling) … … 30 35 * Multi processors (Network Communication) 31 36 * Multi cores (Partitioned Scheduling) 37 * LAMP annex (Custom Model Processing) 32 38 * Static rules analysis plugins 33 39 * Turnkey integration of [http://www.openaadl.org/ocarina.html OCARINA] syntactic and semantic analysers 34 40 * Customizable AADL rules checkers with [wiki:LMP LMP] 35 41 * Declarative model metrics 36 * Automatic detection of the root system42 * Root system inference 37 43 * Automatic elaboration of the instance model 44 * AADL reverse engineering 45 * AADL instance model graphical editor 46 * Round-trip engineering with [wiki:STOOD Stood for AADL] 38 47 * Assurance cases online verification 39 48 * Logical AADL Model Processing ([wiki:lamp LAMP]) online prolog engine … … 41 50 * LAMP Annexes in AADL packages (verification rules) 42 51 * LAMP Annexes in AADL components (verification goals) 43 * Schedulability analysis 44 * Turnkey integration of the [http://beru.univ-brest.fr/~singhoff/cheddar/ CHEDDAR v3] analysis kernel 45 * AADL to Cheddar model transformation 46 * Enhanced output format for post-processing 47 * VCD (Value Change Dump) file output of the scheduling static simulation 52 * Timing analysis 53 * Schedulability analysis 54 * Turnkey integration of the [http://beru.univ-brest.fr/~singhoff/cheddar/ CHEDDAR v3] analysis kernel 55 * AADL to Cheddar model transformation 56 * Enhanced output format for post-processing 57 * VCD (Value Change Dump) file output of the scheduling static simulation 58 * Dynamic simulation 59 * Turnkey integration of the MARZHIN v2 Multi-Agents simulation engine, developed in collaboration with [http://www.virtualys.fr Virtualys]. 60 * Emulation of the AADL run-time (multi-core, multi-processor and multi-partition architectures) 61 * Display of dynamic time-lines for Processors, Buses, Processes, Threads and Shared Data 62 * Asynchronous user interaction: in and out events and data 63 * Simulation scenarios (input ports) and probes (output ports) 64 * VCD (Value Change Dump) file output of the simulation trace 48 65 * Response time analysis 49 * Safety analysis 66 * Scheduling Aware end to end Flow Latency Analysis (SAFLA) 67 * Safety & Security analysis 50 68 * Generation of Open PSA file from EMV2 51 69 * Fault Tree Analysis with Arbre Analiste 52 * Dynamic simulation 53 * Turnkey integration of the MARZIN v2 Multi-Agents simulation engine, developed in collaboration with [http://www.virtualys.fr Virtualys]. 54 * Emulation of the AADL run-time (multi-core, multi-processor and multi-partition architectures) 55 * Display of dynamic time-lines for Processors, Buses, Processes, Threads and Shared Data 56 * Asynchronous user interaction: in and out events and data 57 * Simulation scenarios (input ports) and probes (output ports) 58 * VCD (Value Change Dump) file output of the simulation trace 70 * Customizable security rules checker 59 71 * Model Properties spreadsheet 60 72 * Extracts main RT properties from all the Thread instances 61 73 * Software to Hardware allocation 62 * Separate configuration files63 74 * PDF documentation generator 64 75 * Ada and C code generators (Ocarina) … … 67 78 * Scripting language for plugins definition 68 79 * Command line options 69 * Powered by [wiki:LMP LMP] (Logic Model Processing)70 * AADL and XML/XMI parsing71 * Model query language72 * Model constraints language73 * Model transformation language74 80 75 81 [[Image(AI1.9.PNG, link=)]]